富锰渣含锰量简易计算公式推导

介绍了富锰渣生产的特点及含锰量计算公式的推导,并用计算的方法论证了富锰渣产品产量、品位与矿石含锰量、（Ｍｎ＋Ｆｅ）、Ｍｎ／Ｆｅ之间的关系。     

A simple decision tree-based disturbance monitoring system for VSC-based HVDC transmission link integrating a DFIG wind farm

Fault detection and classification is a key challenge for the protection of High Voltage DC (HVDC) transmission lines. In this paper, the Teager–Kaiser Energy Operator (TKEO) algorithm associated with a decision tree-based fault classi f ier is proposed to detect and classify various DC faults. The Change Identification Filter is applied to the average and differential current components, to detect the first instant of fault occurrence (above threshold) and register a Change Identified Point (CIP). Further, if a CIP is registered for a positive or negative line, only three samples of currents (i.e., CIP and each side of CIP) are sent to the proposed TKEO algorithm, which produces their respective 8 indices through which the, fault can be detected along with its classification. The new approach enables quicker detection allowing utility grids to be restored as soon as possible. This novel approach also reduces computing complexity and the time required to identify faults with classification. The importance and accuracy of the proposed scheme are also thor oughly tested and compared with other methods for various faults on HVDC transmission lines.     

From simple digital twin to complex digital twin Part I: A novel modeling method for multi-scale and multi-scenario digital twin

In recent years, the digital twin has attracted widespread attention as an important means of digitalization and intelligence. However, the digital twin is becoming more and more complex due to the expansion of need on the simulation of multi-scale and multi-scenario in reality. The instance of digital twin in references mostly concentrates a particular application, while it is still a lack of a method for constructing the complex digital twin in the total elements, the variable scale of working environments, changeable process, not even the coupling effects. In this paper, a novel modeling method for such a complex digital twin is proposed based on the standardized processing on the model division and assembly. Firstly, the complex model of digital twin is divided into several simple models according to the composition, context, component, and code in 4C architecture. Composition and context make the digital twin focus on the effective elements in a specific scale and scenario. Component and code develop the digital twin in standard-based modularization. Secondly, assemble the simple models of digital twins into the complex model through information fusion, multi-scale association and multi-scenarios iterations. Ontology establishes the complete information library of the entities on different digital twins. Knowledge graph bridges the structure relationship between the different scales of digital twins. The scenario iterations realize the behavior interaction and the accuracy calculation results. It provides an implementable method to construct a complex model of digital twin, and the reuse of components and code also enables rapid development of digital twins.     

基于SLIC和区域生长的目标分割算法

传统区域生长算法的分割结果依赖于种子点的选取,且图像自身的噪声以及灰度值不均匀等问题易在分割目标过程中形成分割空洞,针对以上问题提出了基于超像素的改进区域生长算法。采用拉普拉斯锐化,增强待分割目标边界,之后根据像素灰度相似的特征采用SLIC（简单线性迭代聚类算法）超像素分割将原始图像分割成若干不规则区域,建立不规则区域间的无向加权图,选取种子区域,根据无向加权图以分割好的不规则区域为单位进行区域生长,最后在分割目标边缘处以像素为单位做区域生长,细化边界。对比于传统区域生长算法,改进后的算法在分割结果上受种子点选取影响较小,且能有效地解决分割空洞等问题。对比于聚类分割,Otsu（最大类间方差）阈值分割法等典型算法,该算法在分割精度上具有明显优势。     

Evolutionary digital twin: A new approach for intelligent industrial product development

To fulfill increasingly difficult and demanding tasks in the ever-changing complex world, intelligent industrial products are to be developed with higher flexibility and adaptability. Digital twin (DT) brings about a possible means, due to its ability to provide candidate behavior adjustments based on received “feedbacks” from its physical part. However, such candidate adjustments are deterministic, and thus lack of flexibility and adaptability. To address such problem, in this paper an extended concept – evolutionary digital twin (EDT) and an EDT-based new mode for intelligent industrial product development has been proposed. With our proposed EDT, a more precise approximated model of the physical world could be established through supervised learning, based on which the collaborative exploration for optimal policies via parallel simulation in multiple cyberspaces could be performed through reinforcement learning. Hence, more flexibility and adaptability could be brought to industrial products through machine learning (such as supervised learning and reinforcement learning) based self-evolution. As a primary verification of the effectiveness of our proposed approach, a case study has been carried out. The experimental results have well confirmed the effectiveness of our EDT based development mode.     

基于最优采样模式的自适应光线投射法

三维直接体显示算法是显示三维数据体的一种重要显示方法,已广泛应用在医学图象生成和科学可视化领域之中。光线投射法又是三维直接体显示算法中最基本的一种方法。然而由于光线投射法需要大量的计算而受到限制。该文从减少光线投射数目的角度出发,提出了一种基于最优采样模式的频率投射算法。它的优点是不仅可以利用人的简单的视觉模型和强大的傅立叶分析工具,而且在采样模式上也更能符合人类视觉特点,减少了假模式,从而使更多     

Discovering invariants via simple component analysis

We propose a new technique combining dynamic and static analysis of programs to find linear invariants. We use a statistical tool, called simple component analysis, to analyze partial execution traces of a given program. We get a new coordinate system in the vector space of program variables, which is used to specialize numerical abstract domains. As an application, we instantiate our technique to interval analysis of simple imperative programs and show some experimental evaluations.     

基于凸包求解的简单多边形方向判断新算法

Graham ScanA求解简单多边形凸包算法简洁高效,但是对于未确定方向的简单多边形,该算法需设定一个方向求解其凸包。提出一种新的算法,该算法通过利用凸包求解的Graham ScanA算法来判断简单多边形的方向。算法取得了较好的实用效果。     

一种基于DSP的远程接口单元设计

远程接口单元是飞机机电系统的重要组成部分,在新型飞机设计中,远程接口单元的应用越来越广泛。本文基于DSP,设计了一种远程接口单元。该远程接口单元,选择DSP作为处理器,FPGA作为IO管理单元,实现了模拟量采集、离散量采集、离散量输出、HB6096总线通讯和GJB289A总线通讯。经系统联试试验证明,远程接口单元工作稳定可靠,具备一定的工程实用价值。     

Parallel crypto-devices for GF(p) elliptic curve multiplication resistant against side channel attacks

All elliptic curve cryptographic schemes are based on scalar multiplication of points, and hence its faster computation signifies faster operation. This paper proposes two different parallelization techniques to speedup the GF(p) elliptic curve multiplication in affine coordinates and the corresponding architectures. The proposed implementations are capable of resisting different side channel attacks based on time and power analysis. The 160, 192, 224 and 256 bits implementations of both the architectures have been synthesized and simulated for both FPGA and 0.13μ CMOS ASIC. The final designs have been prototyped on a Xilinx Virtex-4 xc4vlx200-12ff1513 FPGA board and performance analyzes carried out. The experimental result and performance comparison show better throughput of the proposed implementations as compared to existing reported architectures.